Patterning

Patterning is the core fabrication step: it transfers intricate, nanometer-scale circuit designs from a photomask onto a silicon wafer using lithography and subsequent etching processes.

Patterning is the critical process for defining microelectronic features (e.g., transistors, interconnects) on a semiconductor wafer. The process begins by coating the wafer with a photosensitive material (photoresist), then using a lithography scanner (e.g., Extreme Ultraviolet/EUV) to expose the desired circuit pattern. To achieve sub-10nm feature density, manufacturers employ advanced techniques like Self-Aligned Double or Quadruple Patterning (SADP/SAQP) or EUV double patterning. These multi-step methods are essential for overcoming resolution limits and precisely defining structures like 3D FinFETs. Successful patterning directly dictates chip performance, yield, and overall gate-level precision, especially at the 5nm node and beyond.

https://en.wikipedia.org/wiki/Multiple_patterning