crossbar array

A high-density, two-terminal grid architecture: it integrates memory and processing at each cross-point, directly accelerating vector-matrix multiplication (VMM) for AI and neuromorphic computing.

The crossbar array is a foundational architecture for in-memory computing (IMC), directly addressing the von Neumann bottleneck. It uses a dense grid of perpendicular nanowires: a non-volatile memory element (like a memristor or RRAM cell) sits at each intersection, storing data as resistance. This allows for parallel, analog computation, executing the critical vector-matrix multiplication (VMM) operation by leveraging Ohm’s and Kirchhoff’s laws. To ensure reliable operation and prevent 'sneak-path' current, advanced configurations like the 1T1M (1-transistor-1-memristor) or 1S1R (1-selector-1-resistor) schemes are often employed. We're seeing real-world density: researchers have demonstrated arrays with a $4.5$ terabits per square inch packing density, proving its potential for next-generation, ultra-efficient hardware.

https://crossbar-inc.com/